PCIe 4.0

As the first commerical x86 server CPU supporting PCIe 4.0, the I/O capabilities of second generation EPYC servers are top of the class. One PCIe 4.0 x16 offers up to 32 GB/s in both direction, so each socket offers up to 256 GB/s in both directions, for a full 128 PCIe 4.0 lanes per CPU. 

Each CPU has 8 x16 PCIe 4.0  links available which can be split up among up to 8 devices per PCIe root, as shown above. There is also full PCIe peer-to-peer support both within a single socket and across sockets.

With the previous generation, in order to enable a dual socket configuration, 64 PCIe lanes from each CPU were used to link them together. For EPYC, AMD still allows for 64 PCIe lanes to be used, but these are PCIe 4.0 lanes now. There is also another feature that AMD has here - socket-to-socket IF link bandwidth management - which allows OEM partners to design dual-socket systems with less socket-to-socket bandwidth and more PCIe lanes if needed. 

We also learned that there are in fact 129 PCIe 4.0 lanes on each CPU. On each CPU there is one extra PCIe lane for the BMC (the chip that controls the server). Considering we are living in the age of AI acceleration, the EPYC 7002 servers will be great as hosts for quite a few GPUs or TPUs. Density has never looked so fun.

Zen 2 and Rome: SMILE For Performance The BIG LIST of Rome CPUs: Core Counts and Frequencies
Comments Locked

180 Comments

View All Comments

  • krumme - Thursday, August 8, 2019 - link

    Because he is feeded by another hand.
    Enjoy the objectivity by Johan as its is very rare these days. It's not easy for AT to post this stuff. So kudos to them.
  • hoohoo - Thursday, August 8, 2019 - link

    Nice review, but tbh I think you should run the AMD system as such, not limit it's RAM to what the Intel system maxes out at. I would not buy a system and configure it to limits of the competition: I would configure it to it's actual linits.
  • yankeeDDL - Thursday, August 8, 2019 - link

    Wow. "Blasted" is the only word that comes to mind. Good job AMD.
  • eastcoast_pete - Thursday, August 8, 2019 - link

    Thanks Johan and Ian! Impressive results, glad to see that AMD is once again making Intel sweat, all of which can only be good for us.
    Question: A bit out of left field, but why does AMD put the 7 nm dies in these close pairs, as opposed to leaving a little more space between them? Wouldn't thermals be better if each chip gets a little more "reserved" lid space? Just curious. Thanks!
  • sharath.naik - Thursday, August 8, 2019 - link

    Now since we finally are entering the era where a single server(Yes backup is addition) is enough for most of smaller organizations. There is one thing that is needed, OS limits/zones which can limit the cpus and memory built in, instead of using VMs. This will save a lot on resources wasted on booting up an entire OS for individual applications. Linux has the ability for targeting specific cpus but not sure windows has it. But there is a need for standardized way to limit resources by process and by user.
  • mdriftmeyer - Thursday, August 8, 2019 - link

    Agreed.
  • quorm - Thursday, August 8, 2019 - link

    Is it possible you haven't heard of docker?
  • abufrejoval - Sunday, August 11, 2019 - link

    or OpenVZ/Virtuozzo or quite simply cgroups. Can even nest them, including with VMs.
  • DillholeMcRib - Thursday, August 8, 2019 - link

    destruction … Intel sat on their proverbial hands too long. It's over.
  • crotach - Friday, August 9, 2019 - link

    Bye Intel!!

Log in

Don't have an account? Sign up now