Power Saving Chipsets - 855PM & 855GM

One of the things we talked about in the introduction was the problem of using desktop chipsets for mobile environments. With Centrino, the Israel design team went in and applied their power-optimizing engineering techniques to the 845 DDR chipset.

One such technique is the way the chipset/CPU handle the FSB interface; on conventional mobile CPUs, when the CPU issues a read request, the read buffers on the CPU are active from the moment the request was sent from the CPU. However, if you look at the fact that the read buffers are not actually being used until the data being requested by the CPU is finally retrieved from memory then you'll realize that this isn't the best way of doing things.

The Centrino approach makes sense and is quite simple; keep in mind that the majority of the Pentium-M starts out in a sleep state, including the read buffers on its FSB interface. When a read request is sent from the Pentium-M CPU to the MCH (Memory Controller Hub aka North Bridge) the read buffers remain asleep, they don't wake up until the data is finally starting to be retrieved from main memory and is being sent to the MCH's buffers before a signal is sent from the chipset to the CPU instructing the CPU to power up the buffers. As is the case with most of the decisions behind the Centrino platform, the tradeoff here is between latency and power; sacrificing a bit of performance in the form of added latency ends up being worth the gain in power savings.

There are two chipsets being launched with the Pentium-M processor as a part of the Centrino mobile architecture - the 855PM and 855GM. Feature-wise, both 855 chipsets are essentially highly power optimized versions of the 845 chipset. They both feature a 64-bit DDR266 memory interface and AGP 4X support, but don't let their looks deceive you, the chipsets are significantly different from the 845. Just like the Pentium-M is far from a Pentium III, the 855 is far from an 845 as it consumes less than 1/2 the power of the 845 chipset.


The 855PM MCH

Note that because of the low power consumption, cooling isn't necessary on the 855PM MCH.

The difference between the 855PM and GM is that the GM includes a power optimized version of Intel's 845G graphics core, while the 855PM has no integrated graphics.


The ICH4-M

Both the 855PM and GM use a new ICH as well, ICH4-M. This particular ICH has deeper sleep states than what we're used to, but the optimizations are no where near as in depth as what we've seen on the CPU/MCH ends. The feature set of ICH4-M is identical to the desktop ICH4.

Productizing Banias - Introducing the Pentium-M Wireless
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  • zigCorsair - Wednesday, July 14, 2004 - link

    I thought it was a very informative article. Of course, I'll be upset if it's biased, but being a master's student in CS, many of the exact details I was looking for were in here, and for that I say thank you.
  • Zebo - Monday, May 10, 2004 - link

    I don't see whats so impressive. An athlon mobile 2600/2800 xp 35W version, which runs ~2000Mhz will kill these. To little to late.
  • Anonymous User - Wednesday, September 10, 2003 - link

    how the hell could this be a balanced and informative article when in their own analysis they ignored their own data?

    There is no mention of the anamolous nature of the BAPCO test..absolutely NOTHING...

    Its enough for me to question the competency of this site...and even to the point where I suspect that certain unethical compromises have been made.
  • Anonymous User - Wednesday, September 10, 2003 - link

    Yeah, I agree with Sprockkets... same reason Athlon XP loses to the P4 in this benchmark... someone was trying to make the P4 look better, and everything else look worse. Now all the sudden, this new great CPU is getting it's but kicked because of all the P4 optimizations (and probably non-P4 deoptomizations).
  • sprockkets - Tuesday, September 9, 2003 - link

    I wonder why the P4 trashes the PM on Content Creation Performance and nothing else? Maybe it's the stupid skewing toward the P4. Why else would it lose here and kick butt everywhere else? www.theinquirer.net has an article which brought this to readers attention.
  • Anonymous User - Thursday, August 21, 2003 - link

    "Without a trace cache, the design team was forced to develop a more accurate branch predictor unit for the Banias core. Although beyond the scope of this article, Banias was outfitted with a branch predictor significantly superior to what was in the Pentium III. The end result was a reduction of mispredicted branches by around 20%."

    Wouldn't he mean that the branch predictor was superior to the P4?
  • Anonymous User - Tuesday, August 19, 2003 - link

    looks good
  • Anonymous User - Friday, August 8, 2003 - link

    An outstanding well balanced article, after this read I feel I really know about Centrino. Thanks

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